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    <blockquote> <p>In a multiprocessor system or a multicore processor (Intel Quad Core, Core two Duo etc..) does each cpu core/processor have its own cache memory (data and program cache)?</p> </blockquote> <ol> <li>Yes. It varies by the exact chip model, but the most common design is for each CPU core to have its own private L1 data and instruction caches. The L2 unified cache is typically shared between all cores.</li> </ol> <blockquote> <p>Can one processor/core access each other's cache memory, because if they are allowed to access each other's cache, then I believe there might be lesser cache misses, in the scenario that if that particular processors cache does not have some data but some other second processors' cache might have it thus avoiding a read from memory into cache of first processor? Is this assumption valid and true?</p> </blockquote> <ol start="2"> <li>No. Each CPU core's L1 caches are on the same die as the core and cannot be accessed by other cores. The cores are each connected to the L2 cache via the shared data bus.</li> </ol> <blockquote> <p>Will there be any problems in allowing any processor to access other processor's cache memory?</p> </blockquote> <ol start="3"> <li>Yes -- there simply aren't wires connecting the various CPU caches to the other cores. If a core wants to access data in another core's cache, the only data path through which it can do so is the system bus.</li> </ol> <p>A very important related issue is the <a href="http://en.wikipedia.org/wiki/Cache_coherency" rel="noreferrer">cache coherency problem</a>. Consider the following: suppose one CPU core has a particular memory location in its cache, and it writes to that memory location. Then, another core reads that memory location. How do you ensure that the second core sees the updated value? That is the cache coherency problem. There are a variety of solutions; see Wikipedia et al.</p>
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    1. POHow are cache memories shared in multicore Intel CPUs?
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    1. USAdam Rosenfield
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