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    <p>One significant difference between <code>LEA</code> and <code>ADD</code> on x86 CPUs is the execution unit which actually performs the instruction. Modern x86 CPUs are superscalar and have multiple execution units that operate in parallel, with the pipeline feeding them somewhat like round-robin (bar stalls). Thing is, <code>LEA</code> is processed by (one of) the unit(s) dealing with addressing (which happens at an early stage in the pipeline), while <code>ADD</code> goes to the ALU(s) (arithmetic / logical unit), and late in the pipeline. That means a superscalar x86 CPU can concurrently execute a <code>LEA</code> and an arithmetic/logical instruction.</p> <p>The fact that <code>LEA</code> goes through the address generation logic instead of the arithmetic units is also the reason why it used to be called "zero-clocks"; it takes no time to execute because address generation <em>has already happened</em> by the time it would be / is executed.</p> <p>It's not <em>free</em>, since address generation is a step in the execution pipeline, but it's got no execution overhead. And it doesn't occupy a slot in the ALU pipeline(s).</p> <p><strong>Edit:</strong> To clarify, <code>LEA</code> is <strong>not free</strong>. Even on CPUs that do not implement it via the arithmetic unit it takes time to execute due to instruction decode / dispatch / retire and/or other pipeline stages that <em>all</em> instructions go through. The time taken to do <code>LEA</code> just occurs <em>in a different stage of the pipeline</em> for CPUs that implement it via address generation.</p>
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    1. COThat makes sense, thanks!
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    2. COYou know that isn't even true, right?
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    3. CO@harold: Can you provide some references as to what you mean by "true" ? Historically, `LEA` and `ADD` being done in different ways (/by different units in the CPU) is true, and even today Intel's CPUs still have different latency/throughput timings for `LEA` vs. `ADD`.
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