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    <p>I have found these bottlenecks before in applications I needed to optimize and they are a sure indication that you've hit a wall and can't really optimize any further.</p> <p>The best course of actions would be to choose a different algorithm or data layout, one that fits the platform and access patterns better than the one you currently have. This is probably the single most important thing you can do.</p> <p>However, due to deadlines or other constraints that sometimes isn't possible either and so you'll need to be creative about it and that would probably imply testing multiple elements at a time using SIMD operations (eg. use the _mm_cmpeq_epi32 intrinsic to compare 4 elements). If you're going to branch on that, you might compare 16 elements, bitwise or the masks together and branch on that (then select the correct data inside the branch). </p> <p>That is primarily of benefit on platforms where branches are very costly and on IA-32/64 that isn't the case (eg. branches are cheap).</p> <p>Also be aware that due to the Out-of-order Execution (OOE) Intel platforms then to use; it could very well be that the profiler you're using is reporting a stall on a more-or-less random location because it just so happens that the processor needs to wait for data to be read from the cache or RAM. </p> <p>If you happen to be in that situation, make sure that you optimize your algorithm to be more cache-friendly (eg. figure out how many items fit in a cache line, reduce the size the data structures etc.)</p>
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    1. USJasper Bekkers
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A row detail

Detail views are divided into sections. All the information in the data section comes from columns in the selected row. The other sections display data from other, related rows.

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