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    <p>For spartan 3, spartan 6, virtex 5, and virtex 6 family FPGAs you can use the simple microblaze design in xapp1141 from Xilinx <strong>without needing EDK</strong>.<br> <a href="http://www.xilinx.com/support/documentation/application_notes/xapp1141.pdf" rel="nofollow">http://www.xilinx.com/support/documentation/application_notes/xapp1141.pdf</a><br> <a href="https://secure.xilinx.com/webreg/clickthrough.do?cid=132893&amp;license=RefDesLicense" rel="nofollow">https://secure.xilinx.com/webreg/clickthrough.do?cid=132893&amp;license=RefDesLicense</a></p> <p>It includes a netlist for a simple microblaze design. If you use this you do not need EDK at all. </p> <p>You can instantiate the netlist in your FPGA design and build it using the normal ISE flow. Then you use the Xilinx SDK to write and compile software for it. You are very limited in the peripherals that the microblaze will have built in: simple data address bus, debug interface, and UART.</p> <p>Any other peripherals you want (ie SPI, I2C, etc) you would have to write in HDL and connect to the simple address and data bus implemented by the simple microblaze. Your software also has to fit in and run out of the internal block ram (8KB) allocated by this microblaze netlist.</p> <p><strong>UPDATE:</strong><br> In ISE 13.4 there is now a Microblaze MCS coregen core that allows you to instantiate a mircroblaze without EDK.<br> <a href="http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_4/ds865_microblaze_mcs.pdf" rel="nofollow">http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_4/ds865_microblaze_mcs.pdf</a><br> By the datasheet it appears to support everything from Spartan 3 to the new 7 series parts.</p>
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