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    <p>By CAS, I assume you're talking about LOCK CMPXCHG</p> <blockquote> <p>Second thread begins to CAS. The first core sends its cache line over to the second core and both cores have that cache line marked shared.</p> </blockquote> <p>You seem to think the operation starts, gets interrupted, continues. CAS is atomic with respect to the memory subsystem. So it reads the value, compares and writes in a single go. There is no time slot where it will lose the cacheline to another core once it acquired it. How does that work ? It raises a processor lock signal during the instruction execution, so that other instructions stall on the memory subsystem until the cacheline is available again. That's why there is a LOCK prefix on the CMPXCHG instruction. You can read the LOCK description for further details.</p> <p>So most of the contention that happens is on the L1 trying to get exclusive ownership of the cacheline while that signal is mostly raised all the time. If the L1 already has the cacheline (such as in the case of 2 threads on the same core), the only contention is on the duration of the CAS itself, not including the cacheline memory transfer across cores (since it's already there). And that's a lot faster.</p>
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    1. POWhat are the CPU-internal characteristics of CAS collision?
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    1. COYes, I do mean LOCK CMPXCHG. The Architecture Manual describes the bus lock signal, but indicates that if all data is in cache, it will not be used and instead the MESI protocol will be used. I can understand how bus lock will work and I can see that will enforce serialisation of the complete operation across cores; but when bus lock is not used, another mechanism is in use - and that is, I think, the case in the benchmark in the OP. I suspect Chris Dodd's comments about RFOs explain the matter. I need to properly think about both your answers though - neither are fully digested yet.
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    2. COYes, it does say that for P6 and further, the external LOCK bus signal is not taken, rather it uses cache lock. But the principle still applies. The cacheline does not move while the cache lock is taken (and it's not something that MESI by itself provides. I cannot find any official reference to this, but this URL helps: https://engineering.purdue.edu/~eigenman/ECE563/Handouts/x86_memory.pdf Note the bits on load_lock and write_unlock, slide 11).
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    3. COReally? I've not come across the notion of 'cache lock'. I thought if MESI was in use, well, you could *tell* if someone else touched your cache line, because you're not exclusive. So you don't *need* cache lock, whatever it is. But perhaps you could be more efficient or I may not understand properly. I'll read the PDF and where it takes me.
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