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  1. POVerilog to GDSII compiler (open-source)
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    <p>May be this question a bit not for StackOverflow, but both compilers and Verilog (which can be considered as programming language) are related to this project.</p> <p>Where can I find a open-source (or downloadable and free-to-noncommercial-use) compiler from Verilog language to the GDSII format or to Netlist? There are a lot of Verilog simulators (which compile it to native machine code or to the C), a lot of Verilog-to-FPGA compilers, but I want compiler, able to generate geometric structures of transisors from Verilog.</p> <p>Netlist is <a href="http://en.wikipedia.org/wiki/Netlist" rel="nofollow">http://en.wikipedia.org/wiki/Netlist</a> - interconnect of IC elements, such as transistor, resistor or even cells (?). It can be converted to GDSII, but if compiler works on "Verilog->Netlist", I also need a free convertor "Netlist->GDS2".</p> <p>GDSII <a href="http://en.wikipedia.org/wiki/GDSII" rel="nofollow">http://en.wikipedia.org/wiki/GDSII</a> - is a format of VLSI integrated circuits (IC), which is acceptable by founrdies for IC fabrication. It is nearly impossible to a single human to get his GDSII fabricated in Silicon, but I think, it can be intresting to try of compiling small examples.</p> <p>This compiler can use "full-custom" (it will draw all transistors itself), or "cell-based" designs (verilog is compiled into a geometric set of some library cells).</p> <p>Of course, the compiler required can be a university project, which can't compile a big verilog project.</p> <p>Thanks.</p>
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