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    <p>If you is about memory access alignment or so - it is internal environment/libc matters how to align dynamic allocations. It is not guaranteed to have some array aligned in specific way if its size is aligned. Many allocators return memory blocks aligned to some value (about of 2x or 4x size of machine word) so it is not the place to bother about alignment.</p> <p>I remember only several things that may have significance:</p> <ol> <li><p>You may want use vector operations and/or unrolled loops to process an array, so it may be necessary to have some padding to make program not to fall beyond allocated area. (But if your vector engine require alignment beyond standard C implementation provide, you have to allocate the memory in another way than just simple malloc() anyway).</p></li> <li><p>Most of memory allocators store service information (e.g. allocated block size) beside allocated area, and total size of memory cut from free are slightly larger. Si it may be best to allocate area of size slightly less than some round value to have areas densely packed in some standard allocation block (say memory page or so). As an example if CPU have 4k page, then page may contain only 3 1024 byte blocks, but 4 1008 byte (=1024-8) blocks.</p></li> <li><p>Also, many memory allocators have a block size threshold, below such memory is allocated from heap, but above it memory is got directly from OS VM dispatcher by whole hardware pages and thus aligned on page boundary. In this case it may be necessary to round allocation size up to page size to get whole page.</p></li> </ol> <p>There may be soume other issues but I don't remember 'em.</p>
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    1. COGreat answer. Two questions. Are blocks in L2 cache the same size as RAM blocks? Does L2 cache cache individual blocks or does it have finer granularity? "As an example if CPU have 4k page, then page may contain only 3 1024 byte blocks, but 4 1008 byte (=1024-8) blocks." How can this be determined?
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    2. COSpecific values are up to MPU developer and may change from model to model, so a cannot answer you in whole. You have to look in MPU data sheets to get your answers. Anyway as a good practice you should not rely on specific values or allocator behavior (at least until your code check this is true). Cache page may vary from model to model, and 'Hardware page' which is VMM page may be switched even by OS, so there are many answers depending on context.
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