Databases
StackOverflow2013
Postsdbo
POtwo way set associative cache referencing using lru
 

Note that there are some explanatory texts on larger screens.

plurals
  1. POtwo way set associative cache referencing using lru
    primarykey
    data
    text
    <p>I am trying to understand how caching works. I am working on a problem to better understand this concept:</p> <blockquote> <p>Given a 2 way set associative cache with blocks 1 word in length, with the total size being 16 words of length 32-bits, is initially empty, and uses the least recently used replacement strategy. Show whether the following addresses hit or miss and list the final contents of the cache.</p> </blockquote> <p>Addresses:</p> <blockquote> <ol> <li>00010001 </li> <li>01101011 </li> <li>00111111</li> <li>01001000</li> <li>00011001</li> <li>01000010</li> <li>10001001</li> <li>00000000</li> <li>01001000</li> <li>00011100</li> <li>00110000</li> <li>11111100</li> <li>00111010</li> </ol> </blockquote> <p>First off, with the given information, it seems to me that there will be 2 offset bits, 3 set bits, and 3 tag bits in the following order (T=tag,S=set,O=offset): TTTSSSOO</p> <p>Example (address 1): </p> <blockquote> <p>Tag=000 (0), Set = 100 (4), Offset = 01 (1)</p> </blockquote> <p>Now, assuming this is correct, the following <em>should</em> happen when the above addresses are looked up:</p> <blockquote> <ol> <li>Miss, stored in set 4, block 0</li> <li>Miss, stored in set 2, block 0</li> <li>Miss, stored in set 7, block 0</li> <li>Miss, stored in set 2, block 1</li> <li>Miss, stored in set 6, block 0</li> <li>Miss, stored in set 0, block 0</li> <li>Miss, stored in set 2, block 0 (block 0 was LRU, now block 1 becomes LRU)</li> <li>Miss, stored in set 0, block 1</li> <li>Hits on set 2, block 1</li> <li>Miss, stored in set 7, block 1</li> <li>Miss, stored in set 6, block 1</li> <li>Miss, stored in set 7, block 0 (block 0 was LRU, now block 1 becomes LRU)</li> <li>Miss, stored in set 6, block 0 (block 0 was LRU, now block 1 becomes LRU)</li> </ol> </blockquote> <p>And the final contents of the cache <em>should</em> look like the following:</p> <blockquote> <p>Set 0: 01000010, 00000000</p> <p>Set 1: empty, empty</p> <p>Set 2: 10001001, 01001000</p> <p>Set 3: empty, empty</p> <p>Set 4: 00010001, empty</p> <p>Set 5: empty, empty</p> <p>Set 6: 00111010, 00110000</p> <p>Set 7: 11111100, 00011100</p> </blockquote> <p>I am having a very difficult time with this so hopefully someone can let me know if I am on the right track or not. If these look ok, I want to try the same exercise but with different addresses for further practice, to make sure that I've got it.</p> <p>EDIT1: New addresses.</p> <blockquote> <ol> <li>000_100_01 </li> <li>000_010_01 </li> <li>000_001_10</li> <li>000_001_01</li> <li>001_010_11</li> <li>000_001_00</li> <li>000_010_11</li> <li>000_010_01</li> <li>001_110_00</li> <li>000_100_11</li> <li>000_000_01</li> <li>000_101_11</li> <li>011_010_11</li> </ol> </blockquote> <p>Which should like:</p> <blockquote> <ol> <li>Miss, stored in set 4 block 0</li> <li>Miss, stored in set 2 block 0</li> <li>Miss, stored in set 1 block 0</li> <li>Miss, stored in set 1 block 1, block 0 becomes LRU</li> <li>Miss, stored in set 2 block 1, block 0 becomes LRU</li> <li>Miss, stored in set 1 block 0, block 1 becomes LRU</li> <li>Miss, stored in set 2 block 0, block 1 becomes LRU</li> <li>Hit, set 2 block 0 becomes LRU</li> <li>Miss, stored in set 6 block 0</li> <li>Miss, stored in set 4 block 1</li> <li>Miss, stored in set 0 block 0</li> <li>Miss, stored in set 5 block 0</li> <li>Miss, stored in set 2 block 0, block 1 becomes LRU</li> </ol> </blockquote>
    singulars
    1. This table or related slice is empty.
    1. This table or related slice is empty.
    1. PTQuestion
    1. USbasil
    1. USbasil
    plurals
    1. This table or related slice is empty.
    1. This table or related slice is empty.
    1. This table or related slice is empty.
    1. This table or related slice is empty.
    1. This table or related slice is empty.
    1. COThe fact that you appear to have misread access 11 as 000_110_00 rather than 001_100_00, indicates that you should probably use separators in your addresses for clarity. (For such exercises, you could replace the least significant two bits with xx [don't care] or just drop them since the cache will load the entire block on a miss.) Also, You might note that access 9 makes block 0 LRU. Other than the misreading of access 11, it looks right.
      singulars
      1. POtwo way set associative cache referencing using lru
      1. USPaul A. Clayton
    2. COIn googling for a visual cache simulator, I encountered [this page](http://www.ecs.umass.edu/ece/koren/architecture/) which seems to have some tools that you might find helpful in exploring computer architecture. (I have not examined them to see how good they are, but it seemed like they *might* be of interest to you.)
      singulars
      1. POtwo way set associative cache referencing using lru
      1. USPaul A. Clayton
    3. COThank you very much. The Tomasulo algorithm on that website is very helpful. I am going to do an edit where I try it again with different numbers and look for input again. I had the LRU changing with access 9, that is a good comment for anyone following along with these though.
      singulars
      1. POtwo way set associative cache referencing using lru
      1. USbasil
 

Querying!

 
Guidance
A row detail

Detail views are divided into sections. All the information in the data section comes from columns in the selected row. The other sections display data from other, related rows.

Related data can be related in a to-one or a to-many fashion. Captions of data related in a to-many fashion link to a list view showing a filtered view of the table.

Try moving around until you find a non-empty to-many entry and click on the label to get to one. You can move back to the root by clicking on the database name in the header.

SQuiL has stopped working due to an internal error.

If you are curious you may find further information in the browser console, which is accessible through the devtools (F12).

Reload