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  1. PO
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    <p>I can't think of another way to do it, simply because you need to both swap and compare to detect if you're allowed to proceed. If you don't have a compare-and-swap command, you'll have to implement it with a looping swap and compare, something like:</p> <pre><code>; Emulate atomic add/sub with atomic swap. ; On entry: ; r0 contains address of variable ; r1 contains value to add or subtract. mutex: defw 0 ; mutual exclusion semaphore (0=free, 1=busy). chng: push r2 ; save variables. ld r2,1 ; claiming value. spin: swap r2,(mutex) ; atomic swap (sounds like a good name for a band). bnz spin ; loop until you have it. add (r0),r1 ; emulated atomic change. swap r2,(mutex) ; free mutex for everyone else. pop r2 ; restore registers. ret </code></pre> <p>It's only really klunky if you're doing it in a lot of places in your code. I've often found that isolating 'klunky' code to a function (like above) makes it far less klunky since you then end up with lots of code segments looking like the much simpler:</p> <pre><code>myvar: defw 0 : : : : : ld r0,myvar ld r1,1 ; increment call chng </code></pre> <p>or, if you want your code even simpler, provide separate <code>incr</code> and <code>decr</code> functions:</p> <pre><code>; Emulate atomic incr/decr with emulated atomic change. ; On entry: ; r0 contains address of variable incr: push r1 ; save registers. ld r1,1 ; increment. call chng ; do it. pop r1 ; restore registers. ret decr: push r1 ; save registers. ld r1,-1 ; decrement. call chng ; do it. pop r1 ; restore registers. ret </code></pre> <p>Then your code sequences become:</p> <pre><code> ld r0,myvar call incr </code></pre> <p>or, if you can do macros, an even simpler:</p> <pre><code>atincr: defm ; do this once to define macro ld r0,&amp;1 call incr endm atincr myvar ; do this in your code, as much as you like. </code></pre>
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    1. POImplement atomic increment using atomic swap?
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    1. POImplement atomic increment using atomic swap?
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    1. COPretty much what I was thinking, but well said. There's additional clunkiness, though, if you want to do this on a single-core machine: in that case a thread that can't acquire the spin lock will chew up cycles until the OS decides to timeslice (or change the code to yield in that case). With a compare-and-swap version, the running thread can always complete the increment, even if another thread was interrupted in the middle of an increment to the same location.
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    2. COThat is a good point since the time of contention for CAS is writing, not reading as in this case, but moot for this question since no CAS is available :-) You would have to yield if possible for this solution.
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    3. COThe only problem with this approach is that you are using a single mutex everywhere. If you're on SMP, and if more threads can modify different vars, then you'll probably want to have a lock per var. Or to choose among a few mutexes according to the address of the var (hashed spinlocks). In that case, make sure that different spinlocks are on different cachelines. If you're insulating against device access, this is unneeded. Are there ARM SMP machines, somewhere?
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