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    <p>Since your processor is modeled in Bluespec, it seems that the code to be executed would get loaded in to the processor's memory using Verilog's <a href="http://www.ee.ed.ac.uk/~gerard/Teach/Verilog/manual/Extras/memory.html" rel="nofollow">$readmemh()</a> function, which reads a text file containing the memory contents. It would be up to the Bluespec model creator to decide what address the code will be loaded into, using the arguments to the <code>$readmemh()</code> function and address specifiers within the text file. </p> <p>The simplest way to create the text file with memory contents is to run your assembly source code through the MIPS assembler and extract the hexadecimal opcodes from the assembler's source code listing.</p> <p>Question: "does the address start counting from address 0x0?"</p> <p>A MIPS processor starts executing code at <code>0x1cf00000</code> when it is reset. (A <a href="http://csg.csail.mit.edu/6.884/handouts/labs/smips-spec.pdf" rel="nofollow">Simple MIPS</a> processor starts at <code>0x00001000</code> when it is reset.) You would normally put a jump to the start of your test program at the reset address. If you load the test program to be executed at address <code>0x0</code>, <code>JR $zero</code> should work. </p> <p>Branches within the test program should all be to relative addresses, so you don't need to do anything special to specify the address of labels within the test code. If you need to branch to a known location for PASS and FAIL, do something like this (assuming PASS is at address <code>0x4000</code>):</p> <pre><code>LI $t0, 0x4000 JR $t0 </code></pre>
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