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POcpuid instruction on i5-2500k: MMX, SSE, SSE2 bits are not set
 

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  1. POcpuid instruction on i5-2500k: MMX, SSE, SSE2 bits are not set
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    <p>Is this expected? I expected my Sandy Bridge CPU to report that it can handle MMX, SSE, and SSE2 instructions. Are these bits not set because these "old" instruction sets have been "superceded" by some of the newer ones? </p> <p>I used <a href="https://stackoverflow.com/a/4823889/340947">this code here</a> to put CPU detection into my code. </p> <pre><code>#include "CPUID.h" int main(int argc, char *argv[]) { CPUID cpuid; cpuid.load(0); printf("CPU: %.4s%.4s%.4s", (const char*)&amp;cpuid.EBX(), (const char*)&amp;cpuid.EDX(), (const char*)&amp;cpuid.ECX() ); char brand[0x30]; cpuid.load(0x80000002); memcpy(brand,&amp;cpuid.EAX(),16); cpuid.load(0x80000003); memcpy(brand+16,&amp;cpuid.EAX(),16); cpuid.load(0x80000004); memcpy(brand+32,&amp;cpuid.EAX(),16); printf("%.48s\n",brand); cpuid.load(1); // tests bit 23 of ECX for popcnt instruction support printf("MMX - %s\n", cpuid.EAX() &amp; (1 &lt;&lt; 23) ? "yes" : "no"); printf("SSE - %s\n", cpuid.EAX() &amp; (1 &lt;&lt; 25) ? "yes" : "no"); printf("SSE2 - %s\n", cpuid.EAX() &amp; (1 &lt;&lt; 26) ? "yes" : "no"); printf("SSE3 - %s\n", cpuid.ECX() &amp; (1 &lt;&lt; 0) ? "yes" : "no"); printf("SSSE3 - %s\n", cpuid.ECX() &amp; (1 &lt;&lt; 9) ? "yes" : "no"); printf("SSE4.1 - %s\n", cpuid.ECX() &amp; (1 &lt;&lt; 19) ? "yes" : "no"); printf("SSE4.2 - %s\n", cpuid.ECX() &amp; (1 &lt;&lt; 20) ? "yes" : "no"); printf("AES - %s\n", cpuid.ECX() &amp; (1 &lt;&lt; 25) ? "yes" : "no"); printf("AVX - %s\n", cpuid.ECX() &amp; (1 &lt;&lt; 28) ? "yes" : "no"); printf("HT - %s\n", cpuid.EAX() &amp; (1 &lt;&lt; 28) ? "yes" : "no"); printf("IA64 (emulating x86) - %s\n", cpuid.EAX() &amp; (1 &lt;&lt; 30) ? "yes" : "no"); printf("Hypervisor? - %s\n", cpuid.ECX() &amp; (1 &lt;&lt; 31) ? "yes" : "no"); printf("popcnt - %s\n", cpuid.ECX() &amp; (1 &lt;&lt; 23) ? "yes" : "no"); return 0; } </code></pre> <p>output:</p> <pre><code>CPU: GenuineIntel Intel(R) Core(TM) i5-2500K CPU @ 3.30GHz MMX - no SSE - no SSE2 - no SSE3 - yes SSSE3 - yes SSE4.1 - yes SSE4.2 - yes AES - yes AVX - yes HT - no IA64 (emulating x86) - no Hypervisor? - no popcnt - yes </code></pre>
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    1. COThis question might also be a good reference: http://stackoverflow.com/questions/6121792/how-to-programmically-check-if-a-cpu-supports-sse3
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