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    <p>There will be no good answers from this information only; we can only guess what source code produced this hardware.</p> <p>But it is clear that you need to examine the source, make a hypothesis why it is slow, take action to correct the problem, and test the solution.</p> <p>And repeat until fast enough.</p> <p>My guess, given your hint that there is a case statement to decode the opcodes...</p> <p>one of the arms is something like:</p> <pre><code>when &lt;some expression involving decode&gt; =&gt; address &lt;= &lt;some address calculation&gt;; </code></pre> <p>The problem is that often the two expressions are inter-related so that they are evaluated in the same cycle. An example solution would be to precompute the address expression (i.e. in the previous cycle) into a register, and rewrite the case arm as:</p> <pre><code>when &lt;some expression involving decode&gt; =&gt; address &lt;= register; </code></pre> <p>If you guessed right, the result will be slightly faster and you have another (similar) bottleneck to fix. Repeat until fast enough...</p> <p>But without the source AND the timing analysis, don't expect a more specific answer.</p> <p>EDIT : having posted a fraction of source code, the picture is a little clearer : you have two nested Case statements, each quite large. You clearly need some simplification...</p> <p>I note that only 2 of the inner case arms assign to i_ram_addr, yet the timing analysis shows a huge and complex mux on i_ram_addr; clearly there are a lot of other case arms that contribute terms to i_ram_addr...</p> <p>I would suggest that you might have to treat i_ram_addr separately from the main Case statement and write the simplest machine you can to generate i_ram_addr alone. For example I would note that the OPCODE case arm is equivalent to:</p> <pre><code>if OPCODE(7 downto 3) = "11101" then ... </code></pre> <p>and ask how simple you can get a decoder for i_ram_addr alone. You may find that a lot of other case arms do very similar things with i_ram_addr (the original 8051 designers would have jumped at the chance to simplify logic!). Synthesis tools can be quite clever at simplifying logic, but when things get too complex they can miss opportunities.</p> <p>(At this stage I would comment out the i_ram_addr assignments and leave the rest of the decoder alone)</p>
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