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    <p>No, you can't do (exactly) this. For almost any instruction on an Intel x86, one of the operands must be a register.</p> <p>There is an exception to that: <code>cmpsb</code> compares <code>[ds:si]</code> to <code>[es:di]</code> (or, in 32-bit mode, <code>[ds:esi]</code> to <code>[es:edi]</code>, or in 64-bit mode, uses <code>rsi</code> and <code>rdi</code>).</p> <p>If you want to use <code>si</code> to point to both operands, however, you'll need to load some other register, then compare:</p> <pre><code>mov al, [temp+si] cmp al, [temp+si+1] </code></pre> <p>Another possibility is to load from <code>[si]</code>, and increment <code>si</code>:</p> <pre><code>lodsb ;roughly equivalent to mov al, [si] / inc si cmp al, [si] </code></pre> <p>Since this is only able to use <code>si</code>, not <code>temp+si</code>, you'd need to add those together before using this. This is a little shorter, but (at least theoretically) slower on most current processors. To regain the speed, you could also use the more primitive instructions:</p> <pre><code>mov al, [si+temp] inc si cmp al, [si+temp] </code></pre> <p>Or, since you're using <code>+temp</code> for both instructions, you might gain a little by doing that addition ahead of time:</p> <pre><code>add si, temp mov al, [si] inc si cmp al, [si] </code></pre> <p>One thing to keep in mind though: since you're working with data in memory, this may not make any real difference in speed -- if you do much with memory, the bandwidth to memory is often (usually?) the bottleneck, so optimizing execution of the instructions on the processor itself makes little difference.</p>
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    1. POThe addressing mode can write like this?
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    1. USJerry Coffin
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    1. COAssuming it's x86, which the OP doesn't specify.
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      1. USBrian Knoblauch
    2. CO<h4>thank you!</h4>
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      1. USLing Tze Hock
 

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