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    <p>It makes more sense if you know of the small gotcha surrounding reading the PC: <em>most</em> instructions that read <em>PC</em> see a value of address_of_current_instruction+8 (except +4 in thumb mode, and <code>ldm</code> in ARM mode might be either +8 or +12 IIRC).</p> <p><code>cfldrdeq mvd15, [r12], #992</code> is not meant to be an instruction; it's a relative relocation that points to a relocation the DATA section. In the DATA section, there'll be a dynamic relocation that points to the actual address. Typical seudocode looks something like this</p> <pre><code> ldr r12,[pc,#small_offset_to_foo] ldr r12,[pc,r12] bx r12 ... a short distance away ... foo: int relative_offset_of_bar_from_the_second_ldr ... a galaxy far far away ... bar: int pointer_to_the_actual_syscall </code></pre> <p>I do not know why the disassembly for <code>syscall()</code> places "foo" between <code>ldr r12,[pc,r12]</code> and <code>bx r12</code>, causing the branch over the non-instruction "foo".</p> <p>It is also worth mentioning that simply pasting the code shown <em>will almost certainly not work</em>: you don't have the relocation that points to the <em>actual</em> implementation of syscall (in a debugger, step past <code>bx r12</code> and you should get there); you'll just branch to some randomish address.</p> <p>The error "cannot use register index with PC-relative addressing" is apparently because you're compiling in Thumb mode (the listing is ARM code). As for <code>cfldrdeq</code>, I believe it's just a conditional <code>cfldrd</code> instruction (the "eq" is a condition code), which Google suggests is related to a the Cirrus Logic "Maverick" processor series.</p>
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    1. COThanks for the detailed response. Isn't the syscall done via the 'svc 0x00000080' instruction?
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    2. COI believe the usual mnemonic is `swi` (not sure about Thumb), but this is very OS-dependent and I'm not aware of the details (except that on Linux, the integer immediate in the instruction is unused to avoid having to read it from memory)
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