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    <p>There are generally two options for you:<br> 1) You could go ahead and implement your own HDMI receiver/transmitter modules in an HDL of your choice. But for your purpose this seems to be too time consuming and too much overkill, because all you want to do is "change some pixel values".<br> I also would not recommend this to a beginner in the field of HDL/FPGA.<br> The HDMI specification is also not available for free as far as I know, so this is probably not the cheapest solution.<br> 2) Use an existing IP core. Have you checked out the "Support Documents" at the bottom of the digilent page(link in your question)? There seems to exist a <a href="http://www.digilentinc.com/Data/Products/ATLYS/Atlys_HDMI_PLB_demo.zip" rel="noreferrer">reference design</a> which " <strong>accepts an HDMI input, buffers the input frames into memory, and then outputs the buffer to another HDMI port.</strong>"<br> If you have the necessary license to use the EDK(Embedded Development Kit) this reference design should contain exactly what you are looking for.<br> But even if you want a pure HDL solution, a look at the HDL source files coming with the EDK solution can't hurt.<br> A full license for the EDK also costs, but you can get a free 30 day evaluation license from Xilinx. </p> <p>Finally there are a lot of free IP cores available on the internet, e.g. on <a href="http://www.opencores.org" rel="noreferrer">OpenCores.org</a>. </p> <p>edit: I just found this Xilinx forum entry <a href="http://forums.xilinx.com/t5/Spartan-Family-FPGAs/Limitations-of-XAPP945-on-the-Atlys-Board/m-p/165404#M12272" rel="noreferrer">Understanding DVI/HDMI and Atlys</a> possibly covering some of the issues you are facing/goind to face. </p>
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