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POcmpxchg for WORD faster than for BYTE
 

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    <p>Yesterday I posted <a href="https://stackoverflow.com/questions/11959374/fastest-inline-assembly-spinlock">this question</a> on how to write a fast spinlock. Thanks to Cory Nelson I seem to have found a method which outperforms the other methods discussed in my question. I use the <code>CMPXCHG</code> instruction to check if the lock is 0 and thereby free. <code>CMPXCHG</code> operates on ´BYTE´, <code>WORD</code> and <code>DWORD</code>. I would assume that the instruction would operate faster on <code>BYTE</code>. But I wrote a lock implementing each of the datatypes:</p> <pre><code>inline void spin_lock_8(char* lck) { __asm { mov ebx, lck ;move lck pointer into ebx xor cl, cl ;set CL to 0 inc cl ;increment CL to 1 pause ; spin_loop: xor al, al ;set AL to 0 lock cmpxchg byte ptr [ebx], cl ;compare AL to CL. If equal ZF is set and CL is loaded into address pointed to by ebx jnz spin_loop ;jump to spin_loop if ZF } } inline void spin_lock_16(short* lck) { __asm { mov ebx, lck xor cx, cx inc cx pause spin_loop: xor ax, ax lock cmpxchg word ptr [ebx], cx jnz spin_loop } } inline void spin_lock_32(int* lck) { __asm { mov ebx, lck xor ecx, ecx inc ecx pause spin_loop: xor eax, eax lock cmpxchg dword ptr [ebx], ecx jnz spin_loop } } inline spin_unlock(&lt;anyType&gt;* lck) { __asm { mov ebx, lck mov &lt;byte/word/dword&gt; ptr [ebx], 0 } } </code></pre> <p>The lock was then tested using the following pseudo-code (please note that the lcm-pointer always will point to an address dividable by 4):</p> <pre><code>&lt;int/short/char&gt;* lck; threadFunc() { loop 10,000,000 times { spin_lock_8/16/32 (lck); spin_unlock(lck); } } main() { lck = (char/short/int*)_aligned_malloc(4, 4);//Ensures memory alignment start 1 thread running threadFunc and measure time; start 2 threads running threadFunc and measure time; start 4 threads running threadFunc and measure time; _aligned_free(lck); } </code></pre> <p>I've gotten the following results measured in msecs on a processor with 2 physical cores able to run 4 threads (Ivy Bridge).</p> <pre><code> 1 thread 2 threads 4 threads 8-bit 200 700 3200 16-bit 200 500 1400 32-bit 200 900 3400 </code></pre> <p>The data suggests that all functions take an equal amount of time to execute. But when multiple threads have to check if <code>lck == 0</code> using a 16-bit can be significantly faster. Why is that? I do not suppose it has something to do with the alignment of the <code>lck</code>?</p> <p>Thanks in advance.</p>
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    1. CO'I know this isn't a lot of difference but as a spinlock is a heavily used object' - haven't explicitly used a single one in 30+ years of multithreaded software development.
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      1. USMartin James
    2. COTry moving the `pause` instruction INSIDE the spin loop rather than outside the loop. 16 bit instuctions require extra 0x66/0x67 prefix bytes making them slightly larger/slower than 8 or 32 bit instructions. So it may be the extra overhead is slowing down the loop enough to reduce contention in the 16-bit case.
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      1. USChris Dodd
    3. COI wouldn't suprised if these locks lead to random corruption, as they modify ebx (a callee save register) without saving and restoring it, which might corrupt some value that a caller expects to be preserved. Use edx instead.
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