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    <p>I intend to use Qemu to generate a memory trace for the execution of a x86 guest operating system.</p> <p>According to tcg wiki page, Qemu uses a handful of helpers to generate load/stores to the target(guest) memory. This list of instructions is <code>tcg_gen_qemu_ld8s/u</code>, <code>tcg_gen_qemu_ld16s/u</code>, <code>tcg_gen_qemu_ld32s/u</code>, <code>tcg_gen_qemu_ld64</code>. (We have a similar set for store instructions). I am trapping all calls to the above functions in the <em>target-i386/translate.c</em> file</p> <p>However, I am still missing load/stores of certain instructions like</p> <pre><code>cmp ecx, [r12+0x4] mov r10b, [r13+0x0] mov byte [rax+0xf0000], 0x0 mov byte [rax+rdx], 0x0 </code></pre> <p>Questions :</p> <ol> <li>Can someone please point to other load/store points (direct or indirect) that I am missing ??</li> <li>Does qemu provide a single entry point function for accesses to guest memory (like <code>guest_read()</code>) which can be instrumented for tracing all loads from the guest memory ???</li> <li>Can somebody please point to a good documentation where I can understand how qemu maintains the state of the guest memory ??</li> </ol> <p>Sorry friends for the misleading instructions in the previous mail.</p> <pre><code>cmp ecx, [r12+0x4] mov r10b, [r13+0x0] mov byte [rax+0xf0000], 0x0 mov byte [rax+rdx], 0x0 </code></pre> <p>It seems all the above instructions are getting covered with the <code>tcg_gen_ld/st</code> helpers. <br/></p> <p>But now I have stumbled upon another problem : <br/> I initially thought that all the interactions with the guest memory happen through the helper instructions in the translate.c file. However, I found that the helper functions for some instructions like <code>cmpxcgh8b</code> and <code>cmpxchg16b</code> are actually accessing guest memory. <br/></p> <p>So, does it mean there are more than one entry points for reading guest memory. Can some one please explain how are the ldq and stq instructions translated to access the guest memory ?? <br/></p>
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