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    <p>VHDL executes if statements sequentially with cascading enables driving the output of your various conditional statements. All of the conditions are completely calculated all the time (lets ignore propagation delay for this point). The hardware "selects" the first statement that meets your conditions (the output from subsequent if elsif branches drive the enables for lower statements so if one evaluates to false the next is enabled). </p> <p>I think the behavior you see does appear "odd" but in reality what do you expect. If you don't give a default value you will get unexpected results based on the hardware. You need to program in black and white. Right now you are programming gray. VHDL is much less forgiving with programmer intent. You must always be definitive and explicit. </p> <p>One potential answer is that this is not the best way to code this if statement. A better method would be to create a "tick" signal indicating a "sure" button depress which drives a separate sequential latching process recording the depressed option. I imagine the behavior you see is hardware dependent and hence difficult to explain. </p> <p>One other point that is not mentioned here is that you should implement a switch debouncer. Effectively the switch might be toggling a lot when held down and acting in a manner you dont expect (wire it up to an oscilliscope and put it in edge mode and youll see). You should count for a time period (eg 1ms) while a switch is depressed and only switch on after that period. Same for turning off. This might do better to buffer any bounciness you might have. This is how you would make your "sure" button depress "tick"</p>
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    1. COThanks for the very detailed reply Paul. Really, I needed a toggle: pressing one button displays the reg contents while pressing the other displays a fixed pattern. I see what you mean about gray; however, adding a default or else states would get in the way of displaying the choice made by the last button. Maybe as you say, it is not possible to do this with an if statement. What perplexed me was that what works in such a straightforward way in software languages, here has such unexpected results. I have many many permutations of this code and behavior changes with every variation.
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    2. COPaul you were right. It turns out my if statement was incomplete and this leads to errors in XST (for Xilinx). This explains why the behavior of this if statement was not as in the software world. In the end, it is safer to implement logic likem this through the use of a case statement. Thanks Paul, @Martin, Voider for your answers.
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    3. COYou can make the default "display the contents that were previously selected". This is automatically defined in sequential if-elsif statements that have no "else" clause (the output of the register is fed back into the input). I am not sure why you chose an asynch process but if you need help designing a synchronous one, I am sure we can help you work towards the most elegant solution. It's not that it is hard but there are a number of things you must think about and a number of "wrong" ways to do it
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