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copied!<p>It's important to note that <code>-M</code> is not magic bullet for dependencies, in many cases you'll need to specify certain headers so things are re-built appropriately if they change. In fact, the most common problem with letting gcc handle dependencies is things not being re-built that should be (broadly depending on the version of GCC being used by whoever runs <code>make</code>).</p> <p>That being said, I don't see anything blatantly wrong with what you're doing.</p> <p>What I recommend doing is eliminating the shell tricks, since it's quite easy to specify exactly what you want. E.g.</p> <pre><code>foo_SOURCES = \ src/foo.cpp \ src/bar.cpp foo_OBJECTS = $(foo_SOURCES:.cpp=.o) foo_DEPS = $(foo_OBJECTS:.o=.d) %.o : %.cpp $(CC) $(CFLAGS) ... $< -o $@ $(CC) -M $< > $(@.o=.d) # lots more rules and targets here # and finally, at the bottom: -include $(foo_DEPS) </code></pre> <p>This is off the top of my head in meta form, so check it to be sure. I believe your problem is actually the dependencies not being included, but I don't see anything obviously wrong with the way you are using <code>pathsubst</code>.</p> <p>As people have noted in comments, running make with debug on may be helpful, but a good first step would be to specify your objects and dependencies without talking to the shell.</p> <p>If you get that working, try just storing the results of your shell calls and echoing them to the screen. That's a lot less noisy than make's debug output.</p>

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