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copied!<p>Sdaz has gotten a remarkable number of upvotes in a very short time, but sadly is perpetuating a misconception about how instructions move through the CPU.</p> <p>The question asked:</p> <blockquote> <p>Instructions go from the RAM, to the stack, to the registers?</p> </blockquote> <p>Sdaz said:</p> <blockquote> <p>Also note, these aren't actual lines of C code executing. The compiler has converted them into machine language instructions in your executable. They are then (generally) copied from the TEXT area into the CPU pipeline, then into the CPU registers, and executed from there.</p> </blockquote> <p>But this is wrong. Except for the special case of self-modifying code, instructions never enter the datapath. And they are not, cannot be, executed from the datapath.</p> <p>The <a href="http://www.eecg.toronto.edu/~amza/www.mindsec.com/files/x86regs.html" rel="noreferrer">x86 CPU registers</a> are:</p> <ul> <li><p>General registers EAX EBX ECX EDX</p></li> <li><p>Segment registers CS DS ES FS GS SS</p></li> <li><p>Index and pointers ESI EDI EBP EIP ESP</p></li> <li><p>Indicator EFLAGS</p></li> </ul> <p>There are also some floating-point and SIMD registers, but for the purposes of this discussion we'll classify those as part of the coprocessor and not the CPU. The memory-management unit inside the CPU also has some registers of its own, we'll again treat that as a separate processing unit.</p> <p>None of these registers are used for executable code. <code>EIP</code> contains the address of the executing instruction, not the instruction itself.</p> <p>Instructions go through a completely different path in the CPU from data (Harvard architecture). All current machines are Harvard architecture inside the CPU. Most these days are also Harvard architecture in the cache. x86 (your common desktop machine) are Von Neumann architecture in the main memory, meaning data and code are intermingled in RAM. That's beside the point, since we're talking about what happens inside the CPU.</p> <p>The classic sequence taught in computer architecture is fetch-decode-execute. The memory controller looks up the instruction stored at the address <code>EIP</code>. The bits of the instruction go through some combinational logic to create all the control signals for the different multiplexers in the processor. And after some cycles, the arithmetic logic unit arrives at a result, which is clocked into the destination. Then the next instruction is fetched.</p> <p>On a modern processor, things work a little differently. Each incoming instruction is translated into a whole series of microcode instructions. This enable pipelining, because the resources used by the first microinstruction aren't needed later, so they can begin working on the first microinstruction from the next instruction.</p> <p>To top it off, terminology is slightly confused because <em>register</em> is an electrical engineering term for a collection of D-flipflops. And instructions (or especially microinstructions) may very well be stored temporarily in such a collection of D-flipflops. But this is not what is meant when a computer scientist or software engineer or run-of-the-mill developer uses the term <em>register</em>. They mean the datapath registers as listed above, and these are not used for transporting code.</p> <p>The names and number of datapath registers vary for other CPU architectures, such as ARM, MIPS, Alpha, PowerPC, but all of them execute instructions without passing them through the ALU.</p>

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