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copied!<p>Did you verify that the conditional stays as a conditional in assembly? generally with simple conditionals such as the one presented above, the expression can be optimized to a branchless sequence (either at machine level using machine specific instructions, or at IR level using some fancy bit math).</p> <p>In your case, you conditional gets folded down very nicely on x86 to a flat sequence (and AFAIK, this will occur on most non-x86 platforms too, as its a mathematical optimization, not a machine specific one):</p> <pre><code>IDIV DWORD PTR SS:[ARG.1] MOV EAX,EDX NEG EAX ; Converts EAX to boolean SBB EAX,EAX NEG EAX </code></pre> <p>So this means the aren't any branches to predict, other than your outer loop, which follows a pattern, meaning it won't cause any mis-prediction (it might mis-predict on exit, depending on the generated assembly, but its exited, so it doesn't matter).</p> <p>This brings up a second point, never <em>assume</em>, always profile and test (one of the cases where assembly knowledge helps a lot), that way you can spend time optimizing where it <strong>realy</strong> matters (and you can understand the inter and inner workings of your code on your target platform better too). </p> <p>If you really are concerned about branch mis-prediction and the penalties incured, use the resources provided by your target architectures manufacturer (different architectures behave very differently for branch mis-prediction), such as <a href="http://software.intel.com/en-us/articles/avoiding-the-cost-of-branch-misprediction/" rel="nofollow">this</a> and <a href="http://software.intel.com/en-us/articles/quantify-the-penalty-of-branch-misprediction-on-64-bit-architecture/" rel="nofollow">this</a> from Intel. AMD's CodeAnalyst is a great tool for checking branch mis-prediction and the penalties it may be causing.</p>

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